Tapaswi
Digital/RTL design Engineer| Computer architecture and VLSI Enthusiast
- Role
- Asic Design Engineer - Soc Design at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Asic Design Engineer - Soc Design
May 2024 — Present · Bengaluru, IN
Job responsibilities include: IP integration, Top level physically aware connectivity, Connectivity tool bringup and usage support, Physically aware RTL Linting.
Education
Jain Vidhyaniketan -Kanakapura
School
2000 — 2011
Govt. S K S J Technological Institute, BANGALORE
Engineer’s Degree, electronics and communications engineering
2013 — 2017
RV College Of Engineering
Master's degree, VLSI Design and Embedded systems
2020 — 2022
Jain vidyaniketan PU college kanakapura
Pre University, Physics Chemistry Maths Electronics
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