Tanmay Rao M
SMTS Silicon Design Engineer @ AMD
- Role
- Smts Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Tanmay Rao M
Design Verification Engineer with 14 years of Industry Experience.Currently Working on AMD Data Fabric VerificationWorked on USB IP Verification
Experience
Smts Silicon Design Engineer
May 2025 — Present · Bengaluru, IN
Verification Engineer in the AMD Data Fabric Team. Responsible for verifying the Cache Coherency block
Education
Chinmaya Vidyalaya, Kannur, Kerala
Senior Secondary School, Computer Science
2004 — 2006
Chinmaya Vidyalaya, Kannur, Kerala
High School
1992 — 2004
Manipal Centre for Information Sciences, Manipal, Karnataka
Master of Science (M.S.), VLSI CAD
2010 — 2012
Amrita School of Engineering, Amritapuri, Kollam, Kerala
Bachelor of Technology (B.Tech.), Electronics And Communication
2006 — 2010
Skills
- Logic Synthesis
- Logic Design
- Modelsim
- C++
- Uvm
- Design Compiler
- Hdmi
- Systemverilog
- Formal Verification
- Usb 2.0
- Usb 3.0
- Verilog
- Application-Specific Integrated Circuits (Asic)
- Very-Large-Scale Integration (Vlsi)
- Vlsi
- Microcontrollers
- Asic
- Static Timing Analysis
- Digital Electronics
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