Tanay Patil

Design Verification Engineer at Hewlett-Packard Enterprise

Role
Design Verification Engineer at Hewlett Packard Enterprise
Location
San Jose, CA, US
LinkedIn followers
500 followers

Experience

  1. Design Verification Engineer

    Hewlett Packard Enterprise

    Sep 2021 — Present · CA, US

    California, United States

Education

  • San José State University

    Electrical Engineering

    2019 — 2021

  • Vishwakarma Institute of Information Technology

    Bachelor of Engineering - BE

    2014 — 2018

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Tanay Patil — Design Verification Engineer at Hewlett Packard Enterprise in San Jose, CA, US | Unifers