Tabrez Kazmi
Member of Technical Staff at AMD
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Tabrez Kazmi
Experienced DFT engineer having worked on complex SoCs involving MBIST, Scan and JTAG networks. Also skilled in Verilog, Perl and RTL coding.
Experience
Mts Silicon Design Engineer
Oct 2025 — Present · Hyderabad, IN
Education
VEDA IIT
Master in VLSI, vlsi
2014 — 2016
Muffakham Jah College/Osmania University
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2010 — 2014
Skills
- Matlab
- Assembly Language
- C++
- Java
- C
- Programming
- Tcl
- Verilog
- Windows
- Nc-Verilog
- Perl
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