T Tushar Shenoy
Hardware Design Engineer @Anmaya Technologies | Ex-Intern @Samsung Semiconductor (SSIR) | ECE’25 | NMAM Institute of Technology
- Role
- Hardware Design Engineer at Anmaya Technologies
- Location
- Mangaluru, KA, IN
- LinkedIn followers
- 500 followers
About T Tushar Shenoy
Hi, I’m Tushar, an Electronics and Communication Engineer with an ever-growing curiosity for how silicon, systems and code intersect to solve real-world problems. My story is part HDL, part soldering iron and a whole lot of asking “what if we try this?”A Taste for Silicon and SystemsFrom a young age, I was the kind to dismantle gadgets just to see what lay underneath those plastic shells than just use it. That spark led me to NMAM Institute of Technology, where I deep-dived into VLSI and Embedded Systems, blending theory with hands-on design.At Samsung Semiconductor, my internship thrust me into the beating heart of real hardware design. There, I architected and implemented a 64KB, 4-way set-associative cache controller IP, piecing together intricate blocks for Tags, LRU and Data, implementing cache flush/invalidation, tackling synthesis and lint issues and verifying every scenario from clean hits to back-to-back dirty block write-backs. It was intense, collaborative and addictive, the kind of work where you lose track of time until the last waveform in SimVision finally matches the expected output, cycle by cycle.Making, Building and SharingBut my journey didn’t begin or end with Samsung. I’ve built IoT-enabled payment gateway with dynamic QR based UPI payment via ESP32, ECG monitoring systems with ADS1293 and even published a Springer paper on smart insole design for foot pressure monitoring and also fetched the “Best Project of the Year” award in the EXPRO 24-25 (Annual Exhibition of Final Year UG Projects 2024-25). I thrive on building things that actually work end-to-end, from first logic sketch to that satisfying moment when hardware and software shake hands for the first time.I love sharing that excitement too, whether running workshops on Proteus for circuit simulation, leading demos on ESP-IDF (because everyone should experience the joy of blinking their first LED or making ESP32s talk over peer-to-peer networks) or mentoring juniors on their first project. Leading as Technical Head of ELECSA, I’ve organized events, solved last-minute tech chaos and made sure others got their own “it works!” moment.The Road AheadI’m here to keep building, teaching and exploring, connecting with fellow builders, mentors and curious minds in semiconductors, EDA and embedded systems. Because for me, engineering isn’t just a career, it’s an adventure best shared with people who love making things as much as I do.Let’s design, debug and innovate together.
Experience
Hardware Design Engineer
Oct 2025 — Present
Working on the FPGA implementation of Digital communication systems on the ZedBoard using Vivado. My work primarily involves RTL design, debugging and verification using tools like ILA and VIO. I also handle board bring-up activities and troubleshoot custom hardware, identifying and resolving issues on faulty boards.I am gaining strong hands-on experience in the complete RTL/FPGA design flow, including synthesis, timing analysis and hardware validation. Along with my technical work, I mentor and guide interns, contribute to embedded systems projects and regularly deliver technical sessions as a speaker in workshops conducted by the company.
Education
Canara College
Pre-University College, PCME, English, Hindi
NMAM Institute of Technology
Bachelor of Engineering- BE, Electronics and Communication
Kendriya Vidyalaya
Senior Secondary School
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