Syed Aamir Khushnood

About Syed Aamir Khushnood

I am a design verification engineer with hands-on experience in SoC and IP-level verification using SystemVerilog and UVM. Currently working on MIPI DSI and processor boot verification for SoC platforms, I focus on building structured, coverage-driven verification environments aligned with industry standards.My technical expertise includes:• UVM-based Testbench Architecture• Functional Coverage & Assertion-Based Verification• AMBA (AXI/AHB/APB), MIPI DSI, UART, QSPI, I2C• C-based boot validation and memory-mapped testingBeyond core verification, I have served as a VLSI trainer, mentoring engineers on RTL design, UVM methodology, and debugging workflows.Earlier in my career, I also worked in business development, where I developed client communication, technical presentation, and solution-oriented thinking skills—enabling me to bridge engineering depth with business understanding.I believe strong verification engineers must understand: System architecture Protocol behavior Coverage closure strategy Practical silicon challengesI am passionate about building scalable verification environments and contributing to next-generation SoC development.

Experience

1. Design Verification Engineer

   Chipsolve Technologies Private Ltd

   Jul 2025 — Present · Hyderabad, IN

   Working on SoC-level design verification for mobile and automotive platforms, focusing on protocol and boot validation. Involved in developing UVM-based environments and executing functional verification to ensure protocol compliance and system-level correctness.• Developed and maintained UVM testbenches for MIPI DSI controller verification at SoC level.• Created and executed test scenarios for protocol validation, power mode transitions, and video data transmission.• Verified multi-stage processor boot sequence including Boot ROM execution and firmware loading.• Performed functional coverage analysis and validated expected behavior using C-based test programs.• Debugged simulation issues and ensured proper initialization of processor and key subsystems.

Education

• Independent Study

  Engineering Entrance Examination Preparation

• University College of Engineering & Technology (UCET)

  Bachelor of Technology - BTech

• BIT Sindri

  Master of Technology - MTech

• DAV Schools Network

  DAV koyla Nagar Dhanbad, Senior Secondary School

• Guru Gobind Singh Public School - Chas, Bokaro Steel City

  GGSPS Dhanbad, Secondary School