Swathi Yanamandra
ASIC Verification Engineer at Cisco
- Role
- Sr Asic Verification Engineer at Cisco
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Sr Asic Verification Engineer
Nov 2017 — Present · San Jose, CA, US
Education
San José State University
Master's degree, Electrical Engineering
2014 — 2015
International Institute of Information Technology Hyderabad (IIITH)
M Tech, VLSI & Embedded Systems
2007 — 2009
Osmania University
B.E, Electronics and Communication Engineering
2003 — 2007
Skills
- C++
- Fpga
- Asic
- Rtl Verification
- Application-Specific Integrated Circuits (Asic)
- Rtos
- Perl
- Embedded Systems
- C
- Very-Large-Scale Integration (Vlsi)
- Field-Programmable Gate Arrays (Fpga)
- Cmos
- Debugging
- Rtl Design
- Shell Scripting
- Fpga Validation
- Soc
- Vlsi
- Functional Verification
- Uvm
- Systemverilog
- Verilog
- System on a Chip (Soc)
- Tcl-Tk
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