Swarnima

About Swarnima

I’m a hardware developer with a background in microelectronics and VLSI design, currently working at IBM on the Pervasive Core logic of the Power processor. My work involves designing and writing RTL in VHDL/Verilog, RTL debugging, and functional verification using simulation-based workflows and Python testbenches(cocotb).I hold an M.Tech in Microelectronics and VLSI Design from IISc Bengaluru and a B.Tech in Electronics and Communication Engineering from NIT Patna. During my academic and professional journey, I’ve worked on processor-oriented designs such as programmable timers, asynchronous FIFOs, and a multi-cycle RISC-V CPU, along with FPGA-based and transistor-level design projects.I enjoy working close to the hardware, understanding corner cases, and collaborating with design and verification teams to improve reliability and correctness. I’m keen on learning, refining my fundamentals, and contributing steadily to robust digital and processor-level designs.

Experience

1. Hardware Developer

   IBM

   Jul 2025 — Present · Bengaluru, IN

   RTL design for PC(Pervasive Core) unit in Power Processor

Education

• National Institute of Technology , Patna

  B.TECH, Electrical, Electronics and Communications Engineering

• Indian Institute of Science (IISc)

  Masters , Microelectronics and VLSI design