Swapna Marupaka

SoC Validation, Program Management Leadership, USB C Technology, Ecosystem Enablement, System and Platform Engineeting

Role
Soc Validation Leader at Intel
Location
Santa Clara, CA, US
LinkedIn followers
500 followers

About Swapna Marupaka

Seasoned Project Manager with a proven track record of leading technology development…

Experience

  1. Soc Validation Leader

    Intel

    Jan 2025 — Present

Education

  • Osmania University

    Bachelor's degree

    1999 — 2003

  • University at Buffalo

    Master's degree

    2003 — 2005

Skills

  • Vcs
  • Modelsim
  • Pattran
  • Production Support
  • Verilog Hdl
  • Integrated Circuit Design
  • Digital Design
  • Debugging
  • Soc
  • Product Development
  • Embedded Systems
  • Eda
  • Debussy
  • Manufacturing Start-Up
  • Drc
  • Vhdl
  • Strategic Planning
  • Logic Analyzer
  • Vendor Management
  • Cross-Functional Team Leadership
  • Product Innovation
  • Lvs
  • Cadence
  • Ic
  • Component Validation
  • Electronics
  • Stakeholder Management
  • Semiconductors
  • Semiconductor Industry
  • Verilog
  • Mems
  • Asic
  • Product Management
  • Function Generator
  • Stil-Based Converstion Tool
  • Power Delivery
  • Cadence Virtuoso Layout Editor
  • Mixed Signal Oscilloscopes
  • Ate V93k
  • Vtpsim

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Swapna Marupaka — Soc Validation Leader at Intel in Santa Clara, CA, US | Unifers