Suyog Chavan
Principal Product Engineer at Cadence Design Systems
- Role
- Principal Product Engineer at Cadence
- Location
- Pune, MH, IN
- LinkedIn followers
- 500 followers
About Suyog Chavan
Expertise in power grid and electromigration analysis for digital and analog semiconductor designs-Deep exposure to EM rules for advanced nodes N28/20/14/10 NM process nodes across all major semiconductor foundries- Sound understanding of parasitic extraction for timing and EM analysis, circuit simulation, power grid analysis of low power designs and implementation environment-Good Knowledge of Physical Design Flow.
Experience
Principal Product Engineer
Jun 2021 — Present · Pune, IN
Education
Dr. Babasaheb Ambedkar Technological University, Lonere
Bachelor of Technology (B.Tech), Electronics and Telecommunication
2008 — 2012
VIT University
Master of Technology (M.Tech.), VLSI Design
2013 — 2015
Skills
- Cadence Virtuoso
- System Verilog
- Uvm
- Verilog
- Rtl Verification
- Vhdl
- Perl
- Cadence Encounter
- Tcl
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.