Sushil Sharma
FPGA/RTL Design Engineer at Intel Technology Inc.
- Role
- Fpga Rtl Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sushil Sharma
1-FPGA based RTL implementation using VHDL/Verilog, functionalverification, hardware board bring‐up and debugging using zynq-7020,Artix-7.2-Hands‐on Experience in FPGA Design optimization and timing closure.3-Communicaton protocal: Ethernet, PCI, AXI4, I2C, SPI.4-Professional experience in FPGA based logic implementationusing industry‐standard EDA Tools,Xilinx-ISE, Vivado, Xilinx SDK.
Experience
Fpga Rtl Design Engineer
Jun 2022 — Present · Bengaluru, IN
Education
Inter college jaura bazar
12TH, Mathematics
2008 — 2010
Inter College Jauara Bazar
10th, Physical Sciences
2008
BABU BANARSI DAS INSTITUTE OF TECHNOLOGY DUHAI
B.TECH, ELECTRONICS ANDCOMMUNICATION ENGINEERING
2011 — 2015
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