Surya Prakash
Analog & Mixed Signal Layout Design
- Role
- Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Surya Prakash
Work on Custom Layout and verification using Cadence Virtuoso LE & XL & synopsis Galaxy…
Experience
Design Engineer
Dec 2021 — Present · Bengaluru, IN
Education
Kurukshetra University
M.Tech
2008 — 2010
Skills
- Functional Verification
- Verilog
- Scripting
- Vlsi
- Design Rule Checking (Drc)
- Systemverilog
- Application-Specific Integrated Circuits (Asic)
- Physical Verification
- Hercules
- Tcl
- Layout Versus Schematic (Lvs)
- Lvs
- Cadence
- Microarchitecture
- Asic
- Soc
- Drc
- Very-Large-Scale Integration (Vlsi)
- Standard Cell
- Virtuoso
- Perl
- Analog Circuit
- Cadence Virtuoso Layout Editor
- Cadence Virtuoso
- Physical Design
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