Surya Bhushan Dwivedi
Physical Design Timing Engineer @Intel
New Delhi, DL, IN
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WORK HISTORY
Jun 2022 — Present
Physical Design Timing Engineer @Intel
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Bengaluru, IN
1) Have experience in building full chip timing model.2) Have experience in closing timing violations at subFC and FC level.3) Have experience in delivering feedback for all DRV rules ( intel tool: Caliber)4) Have experience in PHY analysis at timing level.5) Have created multiple automation scripts as per the requirements of the projects.
EDUCATION
2020 — 2022
Indian Institute of Technology, Madras
Master of Technology - MTech
2016 — 2020
National Institute of Technology Kurukshetra
Bachelor of Technology
ABOUT SURYA BHUSHAN DWIVEDI
Current status- working in Intel corporation.
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