Suresh Reddy Maligi
Design Verification Engineer at Intel Corporation
- Role
- Design Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Suresh Reddy Maligi
Working on GPU Functional Verification(IP/SOC). Verilog, System Verilog, C, C++, Python, OVM/UVM AXI, APB & CXL Worked on Discrete Graphics SoCs from server and client segments. Worked on fabric subsystem, Client Discrete Graphics SoC datapath, AI SoC Interested in memory hierarchy(cache/main memory), fabrics and memory management etc.
Experience
Design Verification Engineer
Jul 2021 — Present · Bangalore Urban, IN
Led SoC and subsystem verification using SystemVerilog, OVM, and UVM for discrete graphics on client and server platforms. Automated workflows with Python and C, boosting verification efficiency while driving test list management, testbench development, and complex debugging with strong system-level insight.
Education
APIIIT, Rajiv Ghandhi University of Knowledge Technologies,Govt of Andhra Pradesh
Bachelor of Technology (B.Tech.), Electronics and Communication Engineering, 8.56/10
2013 — 2017
Z P High School,Mulakalacheruvu
VIII class to X class, 96.1%
2007 — 2011
National Institute of Technology Calicut
Master of Technology - MTech, Electronics Design and Technology, 8.42/10
2019 — 2021
Skills
- Electronics
- Java
- Raspberry Pi
- Internet of Things
- Vhdl
- Microsoft Office
- Microprocessors
- Multisim
- Arduino Uno
- Matlab
- Ethical Hacking
- Ethics and Values in Engineering Profession
- C Programming Language
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