Suresh Kumar Ravichandran
Design Verification Engineer at Apple
- Role
- Design Verification Engineer at Apple
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Suresh Kumar Ravichandran
I have completed Masters in Computer Engineering at Texas A&M University. I am an active learner and will contribute to the development of the society.Programming Languages: C, C++, MATLAB, Python, Perl, Ruby and Specman eHardware Languages: Verilog and System VerilogEDA Tools: Cadence IMC, Cadence Simvision, Cadence Spectre, Cadence Virtuoso, Synopsys Design Vision, Synopsys PrimeTime, SOC Encounter, vPlanner, vManager and Xilinx ISECertifications: Udemy: SoC Verification Using System Verilog, VLSI System Design - Physical Design Flow and Complete Python Bootcamp Cadence: Specman Fundamentals for Block-Level Environment Developers, SystemVerilog for Design and Verification, SystemVerilog Advanced Verification Using UVMCoursera: Machine Learning
Experience
Design Verification Engineer
Oct 2023 — Present · Sunnyvale, CA, US
Education
SRDK VIVEKANANDA VIDYALAYA
High School, High School/Secondary Diplomas and Certificates
2006 — 2013
Texas A&M University
Master of Engineering - MEng, Computer Engineering
2017 — 2019
Anna University Chennai
Bachelor's degree, Electronics and Communications Engineering
2013 — 2017
Skills
- C++
- C
- Microsoft Office
- Matlab
- Programming
- Research
- Arduino
- Electronics
- Engineering
- Microsoft Powerpoint
- Embedded Systems
- Pspice
- Psoc
- Cadence Virtuoso
- Microsoft Word
- Verilog
- System Verilog
- Computer Architecture
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.