Suresh Vasu
Principal Engineer - Silicon Validation Architect - Post Silicon Validation / Pre Silicon Verification at Intel Corporation / Ex- ARM / Ex- TI
- Role
- Principal Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Suresh Vasu
21+ Years of Experience in Pre-Silicon Verification and Post Silicon…
Experience
Principal Engineer
Apr 2024 — Present · Bengaluru, IN
Education
Periyar University
BE
2000 — 2004
Skills
- Functional Verification
- Verilog
- Soc
- Scripting
- Asic
- Ncsim
- Specman
- Systemverilog
- Vlsi
- Eda
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