Suresh Paidi
- Role
- Cirrus Logic
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Suresh Paidi
Design Verification Engineer- 12+ years of experience in SoC and Block level…
Experience
Present
Skills
- Gpu
- Perl
- Spyglass
- Altera Quartus
- System on a Chip (Soc)
- Asic
- Mbist
- Dft
- Logic Synthesis
- Vcs
- C++
- Dsp
- Amba Ahb
- Modelsim
- Xilinx
- C
- Soc
- Synopsys
- Application-Specific Integrated Circuits (Asic)
- Matlab
- Systemverilog
- Ahb
- Cmos
- Verilog
- Cuda
- Vhdl
- Simulations
- Rtl Design
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