Suresh J

Experience

1. Sr Physical Design Engineer

   STMicroelectronics

   Oct 2019 — Present

Education

• Jawaharlal Nehru Technological University, Kakinada

  BTech - Bachelor of Technology, Electrical, Electronics and Communications Engineering

• National Institute of Technology Nagaland

  Master of Technology (M.Tech.), VLSI DESIGN

  2014 — 2016

Skills

• Tcl
• Perl
• Physical Design
• Verilog
• Icc
• Design Rule Checking (Drc)
• Fd Soi
• Sentaurus for Device Design
• Low-Power Design
• Process Simulation
• Anteena Effect
• Logic Design
• Em
• Dft
• Esd Control
• Vhdl
• Sta
• Erc
• Application-Specific Integrated Circuits (Asic)
• Xilinx Ise
• Prime Time
• Silvaco
• Layout Versus Schematic (Lvs)
• Logic Synthesis
• Cmos
• Physcal Verification