Surangi Jayawardena
Technology Development Module and Yield Integration Engineer @Intel
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WORK HISTORY
Technology Development Module and Yield Integration Engineer @Intel
Hillsboro, OR, US
EDUCATION
University of Massachusetts Lowell
Doctor of Philosophy - PhD, Chemistry
University of Colombo
BSc, Chemistry Major
ABOUT SURANGI JAYAWARDENA
Semiconductor Focus 2022 - Present Semiconductor technology development engineer with experience in exploring avenues of improving yield/performance of RibbonFET Gate All Around (GAA)(Intel 18A technology). Yeild improvement through defect reduction pathways in HiK metal gate and fin etch processes in 18A technology. Experienced in managing gas-based isotropic dry etch TEL Certas LEAGA for high volume manufacturing (HVM) tool. Academic Research Focus 20••••22Nanoparticle modification for end-user applications, including therapeutics and diagnostics. Nanomaterial conjugated materials that enhance the efficacy of the conjugated therapeutic. Diagnostics that target diseased locations through molecular biomarkers to increase the signal-to-noise ratio.
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