Suneel M.

About Suneel M.

Possible rewritten summary:Qualcomm\'s Senior Physical Design Engineer, I design and deliver high-performance and low-power solutions for leading-edge products using my expertise in ASIC design and CMOS technologies. Working with deep sub-micron CMOS technologies (7nm, 5nm) and the entire ASIC design flow (RTL to GDS-II) and timing closure, I have contributed to several complex and challenging projects, such as designing a 1GHz processor with low power consumption and high performance. I also have skills in PERL/TCL scripting and Linux platform.I hold a Master\'s Degree in VLSI Design from Vellore Institute of Technology, where I gained a strong foundation in the principles and applications of VLSI design. Before joining Qualcomm, I served Intel as a client for six months at Eximius Design, where I was also a Senior Physical Design Engineer for four years. I am passionate about learning new technologies and staying updated with the latest trends and innovations in the semiconductor industry. I am motivated by the opportunity to create products that enhance the lives of millions of people. I am also a team player who values collaboration, communication, and feedback. I seek to continuously improve my skills and knowledge and to share my insights and ideas with others.

Experience

1. Senior Lead Engineer

   Qualcomm

   Dec 2024 — Present · Bengaluru, IN

Education

• Vellore Institute of Technology

  Master’s Degree, VLSI DESIGN

  2015 — 2017

Skills

• Asic
• Electronics
• C
• Cadence Virtuoso
• Cadence Nclaunch
• Very-Large-Scale Integration (Vlsi)
• Powerpoint
• Cadence
• Physical Design
• Microsoft Powerpoint
• Xilinx
• Systemverilog
• Vhdl
• Static Timing Analysis
• Cadence Virtuoso Layout Editor
• Cadence Encounter
• Verilog
• Tanner Eda
• Microsoft Office
• Vlsi
• Nc-Launch
• Perl
• Tcl
• Application-Specific Integrated Circuits (Asic)