Sundaresan V M
Senior Principal Solutions Engineer @Cadence
Austin, TX, US
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2019 — Present
Senior Principal Solutions Engineer @Cadence
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Bengaluru, IN
EDUCATION
2003 — 2005
Anna University Chennai
M.E. VLSI DESIGN, VLSI DESIGN
1996 — 2000
Madurai Kamaraj University
B.E, EEE
SKILLS
AsicEdaPhysical DesignDebuggingVerilogPhysical VerificationSystemverilogClock Tree SynthesisFunctional VerificationLow-Power DesignSignal IntegrityRtl DesignFloorplanningDrcLow Power DesignTiming ClosureVlsiSocTclStatic Timing Analysis
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