Sumit Kumar Jaiswal
Analog Design Fe Sr Eng @STMicroelectronics
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WORK HISTORY
Analog Design Fe Sr Eng @STMicroelectronics
Grenoble, FR
Working on Image sensor projects
EDUCATION
Indian Institute of Engineering Science and Technology (IIEST), Shibpur
Master of Technology, VLSI DESIGN
RAMAKRISHNA MISSION SHILPAPITHA
DIPLOMA, ELECTRONICS & TELECOMMUNICATION ENGINEERING
KALYANI GOVERNMENT ENGINEERING COLLEGE
BACHELOR OF TECHONLOGY, Electronics and Communications Engineering
KANCHRAPARA R.P HIGH SCHOOL
SECONDARY AND HIGHER SECONDARY
ABOUT SUMIT KUMAR JAISWAL
Have designed a 1GHz Ring Oscillator in C40, which can give 1GHz frequency across PVT with a accuracy of 0.1%.#Have designed 10-bit 375KSPS SAR ADC with ENOB of 9.5 bits.#Have submitted a PATENT proposal of \"Low Area Linear Analog Input Switch\".# Have designed Low power and High power Bandgaps, LDOs, Comparators, RAIL to RAIL Buffers, CLAMP, different architectures of Current-mirrors & Op-AMPs, Fully differential OPAMPs, Sampling Switches, Analog MUX, Comparators, Level shifters, etc. according to given specifications.# Experience in verification & debugging of various analog blocks along with Cross-corners, Monte-Carlo, Post-layout, Aging, DPI etc. simulations.# Good understanding of layout-related stuffs.# Have experience in Analog layouts (8nm FINFET & 180nm BCD) from block level to the chip level.# Have ported IPs of one DK to another DK.# Have assisted TAPEOUTS & gone through the complete sign-off flow for GDS delivery (8nm & 180nm).
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