Sumi Borah

About Sumi Borah

I’m Sumi Borah, a Physical Design Engineer with over 5 years of experience working on cutting-edge chip designs at Intel. My main work is turning RTL code into physical layouts that are ready for manufacturing, a process known as RTL to GDSII. I have worked on multiple technology nodes including 14nm, 10nm, 7nm, and the latest 18A.I specialize in tasks like synthesis, floorplanning, place-and-route (PnR), timing analysis, CTS, and fixing layout issues. I’ve handled complex multi-voltage designs and worked on many blocks running at high speeds (1GHz to 2GHz). I also collaborate with RTL and CAD teams to solve design challenges and improve flows.I started my journey as an intern in FPGA validation, where I learned about FPGA architecture and interfaces like PCIe and DDR4. I’m skilled with tools like Synopsys Fusion Compiler, PrimeTime, ICC2, StarRC, Tweaker ECO, Conformal, Redhawk, and ICV. My technical areas include synthesis, PnR, STA, ECO, low-power design, multi-voltage checks, and layout verification.I’m passionate about physical design and eager to learn and contribute to building better, faster, and more efficient chips.

Experience

1. Lead Design Engineer

   Quest Global

   Sep 2025 — Present

Education

• Thapar Institute of Engineering and Technology, Patiala

  Master of Technology - MTech, VLSI DESIGN

  2018 — 2020

Skills

• Microsoft Office
• Microsoft Excel
• Customer Service
• Microsoft Word
• Team Leadership
• Management