Sumanth Kalluri
ASIC Design @ Microsoft || thedatabus.in
- Role
- Senior Silicon Design Engineer at Microsoft
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sumanth Kalluri
Worked on a variety of projects in a variety of environments involving chip design. Started off with FPGA design for telecom followed by a short stint in HFT applications. Currently owning the complete front-end RTL design flow for multi-million gate Ethernet IP blocks at Infinera.Front end design flow at Infinera includes the following:Microarchitecture and documentation based on design spec and discussions with architects, Interface Spec, RTL Design, RAL flow, Constraints, Lint, CDC, STA debug, synthesis, power optimization exploration, power estimation flow using Average and IR Drop FSDB, API development, Verification plan development and support, Gate Level Simulation, LEC, ECO, Code and Functional Coverage review, Synth messages review like non-resettable flops, pruned flops etc, support to PD and DFT teams
Experience
Senior Silicon Design Engineer
Feb 2026 — Present · Bengaluru, IN
Education
Johnson Grammar School
Schooling
2004 — 2013
Indian Institute of Technology (Indian School of Mines), Dhanbad
Bachelor's degree, Electrical, Electronics and Communications Engineering
2015 — 2019
Narayana Junior College
High School
2013 — 2015
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