Sujil Kottekkat

Director of Engineering @Arm

Director of Engineering responsible for various strategic growth projects. Recruited, mentored, and developed multiple teams of innovative RTL design, verification and software engineers spread across global sites to deliver Arm based SoCs and Compute Subsystems. Collaborated with lines of business to define the product roadmaps, with various engineering groups (architecture, modelling, physical implementation, FPGA prototyping, platform bring-up, software) to develop and deliver the products. Managed the development and delivery of Arm Total Compute SoCs with focus on premium, mainstream and low-end mobile phone. Design topologies included latest Arm CPUs, GPUs, Neural engines, coherent and non coherent interconnects, debug, interrupt controllers, system memory management unit cores along with third party LPDDR5/5X memory controllers. Established an IO competency centre building functional, performant and software compliant server class SoCs based on Arm Neoverse compute subsystems and third party PCIe, CXL, CCIX and DDR5 controllers. Launched verification methodology improvements across Systems engineering teams. Strategically engaged with EDA partners to ensure that the future simulation, formal, emulation and FPGA based verification solutions are useful for Arm projects. Part of the remote site leadership team - Set strategies, addressed remote site challenges and monitored progress towards the goals. Key accomplishments: • Development of multiple generations of Total Compute premium mobile solutions (T0, T1, T2) and associated deliverables to Client LoB and lead partners • Continuous delivery stream of IOCC design, performance and SBSA analysis reports based on Neoverse server class SoCs to external lead partners • Delivery of Dawn SoC RTL with first-time silicon success • Established and managed a standalone system level methodology for SoC projects within Arm