Sudhanshu Badola

About Sudhanshu Badola

DFT Design Engineering Manager with 18+ years of experience

Experience

1. Senior Dft Manager

   Marvell Technology

   Sep 2025 — Present · Bengaluru, IN

   As part of the Custom Solutions team, I lead end‑to‑end project execution and drive DFT design through to post‑SI deliverables, collaborating with stakeholders across global geographies.Key Responsibilities & Achievements:DFT Design Leadership: Managing senior technical leads, strong individual contributors, and junior engineers; ensuring technical excellence and delivery of SI milestones.Mentorship & Growth: Responsible for team development, providing technical mentorship, and guiding career progression.Talent Development: Driving hiring of full‑time engineers and interns to scale high‑performing teams.Vendor Management: Overseeing CW hiring, onboarding processes, and project assignments.Cross‑functional Collaboration: Partnering with legal, procurement, and facilities teams to streamline operations and support project success.Global Stakeholder Engagement: Coordinating with teams across geographies to align technical execution with strategic business goals.

Education

• Dr. A.P.J. Abdul Kalam Technical University

  B.Tech, Electronics and Communication

• Thapar Institute of Engineering & Technology

  M.Tech, VLSI Design and CAD

Skills

• Ncsim
• Vhdl
• Very-Large-Scale Integration (Vlsi)
• Verilog
• Boundary Scan
• Asic
• Systemverilog
• Atpg
• System on a Chip (Soc)
• Debugging
• Scan Insertion
• Application-Specific Integrated Circuits (Asic)
• Soc
• Tcl
• Rtl Design
• Dft
• Vlsi
• Automatic Test Pattern Generation (Atpg)