Sudhakar Sayana

Experience

1. Lead Pcie and Validation Engineer

   NVIDIA

   Jan 2025 — Present

Education

• Birla Institute of Technology and Science, Pilani

  B.E(Hons.) EEE

  1998 — 2003

Skills

• Formal Verification
• Signal Integrity
• Modelsim
• Dft
• Amba Ahb
• Functional Verification
• Soc
• Usb
• Verilog
• Debugging
• Pcie
• Asic
• Perl
• Phy
• Low-Power Design
• Vlsi
• Rtl Design
• Integrated Circuit Design
• Rtl Coding
• Systemverilog
• Ncsim
• Logic Design
• Mixed Signal
• Logic Synthesis
• Firmware
• Vhdl
• Static Timing Analysis
• Digital Electronics
• Synopsys Tools
• Tcl
• Timing Closure