Sudha Kumari
Design verification engineer trainee @silicon patterns ,RTL Design engineer(JRF) @IIT DELHI,Ex-Associate project engineer (DESIGN VERIFICATION) at IIT Guwahati Ex-intern @Cadence
- Role
- Design Verification Engineer at Silicon Patterns
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Sudha Kumari
working as a design verification engineer in silicon patterns,worked as a JRF (RTL DESIGN…
Experience
Design Verification Engineer
Sep 2025 — Present · Hyderabad, IN
Education
Rajiv Gandhi Prodyogiki Vishwavidyalaya
Bachelor of Engineering - BE, Electonics and communication Engineering
Moschip institute of silicon systems
Design and verification trainee( VLSI) , semiconductor
2019 — 2020
LNCT Group of Colleges
Master of Technology - MTech, Vlsi design
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