Sudha Biradar
Physical Design Engineer At Intel Corporation
- Role
- Physical Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sudha Biradar
Have 5+ years of experience in the Physical Verification of SOC partitions and involved in more than 10 projects having hands-on experience in DRC verification, subsystem-level Layout verification, and Top metal SOC integration. I have worked on multiple technology nodes such as 10nm, 10++nm, N3, 3nm, and 20A and worked on industry-standard icc1/icc2/rtlfp/fusion compiler tools. Have knowledge of scripting in languages such as TCL/sch.
Experience
Physical Design Engineer
Jan 2018 — Present · Bengaluru, IN
Physical Verification of SOC partitions and involved in more than 10 client projects having hands-on experience in DRC verification, subsystem-level Layout verification, and Top metal SOC integration. I have worked on multiple technology nodes such as 10nm, 10++nm, N3, 3nm, and 20A
Education
Tungal College of Science and Technology, Jamakhandi
Bachelor of Science - BS
2010 — 2012
Shri Dharmastala Manjunatheswara College of Engineering and Technolog
Bachelor of Engineering - BE
2012 — 2016
Skills
- Microsoft Word
- Java
- C
- Powerpoint
- Microsoft Excel
- C++
- Microsoft Office
- Matlab
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