Sudarshan S.

About Sudarshan S.

Sudarshan is a Sr Staff Product Engineer at Synopsys, the world leader in electronic design automation, with over ten years of experience in the semiconductor industry. He specializes in timing and design robustness solutions for various technology nodes, leveraging his strong skills in SPICE simulation and characterization of standard cells and complex macros for timing, power, noise, On-Chip Variation (OCV) and aging.He collaborates with R&D to define and drive the product direction by identifying designer needs and specifying tool capabilities. He also authors regular technical documents on learnings and communicates the same with the team for cross-functional briefings. He has a proven track record of winning multiple customer engagements by driving technical product evaluations and feature demonstrations along with the sales team. He has a keen interest in learning and applying new concepts and techniques in the field of circuit design and analysis. He holds a Master\'s degree in Electrical Engineering from San Jose State University and a Bachelor\'s degree in Electronics and Communication from Visvesvaraya Technological University, India. He has also co-authored a paper on optical MEMS vibration sensor published in

Experience

1. Senior Product Engineer

   Synopsys Inc

   Sep 2018 — Present · San Francisco, CA, US

   Facilitating global semiconductor leaders in enhancing next-gen timing & process solutions, specializing in PrimeShield/Primetime• Proficient in debugging issues related to Delay Calculation, On-Chip Variation, SPICE simulation & Standard Cell Characterization• Develop comprehensive testplans for diverse tool features, steering alpha/beta testing phases to production qualification• Deployed advanced characterization methodologies on various technology nodes for all flavors of library - NLDM, CCS, LVF• Use Jira Dashboards to quickly identify product quality issues and optimizing the strategy for timely effective solutions• Facilitate seamless collaboration between customer support teams and R&D for swift code implementation in the product suite• Achieved success in multiple customer engagements by overseeing the entire product lifecycle, from technical evaluations andfeature demonstrations to successful deployment

Education

• Jnanodaya PU College

  Class 12, Electronics

  2005 — 2007

• San José State University

  Master's degree, Electrical Engineering

  2015 — 2016

• Visvesvaraya Technological University

  Bachelor of Engineering, Electronics and Communication

  2007 — 2011

• Bangalore Higher Secondary School

  Science

  2003 — 2005

Skills

• Hspice
• Cmos
• Lvs
• P&R
• Ic
• Semiconductors
• Digital Electronics
• Comsol
• Vlsi
• Mixed Signal
• Custom Compiler
• Circuit Design
• Analog
• Physical Verification
• Rsoft
• Design Rule Checking (Drc)
• Drc
• Vhdl
• Sae
• Layout Versus Schematic (Lvs)
• Cadence Spectre
• Very-Large-Scale Integration (Vlsi)
• Physical Design
• Debugging
• Sensors
• Floorplanning
• Cadence Virtuoso
• Modelsim
• C
• Analog Circuit Design
• Virtuoso Layout
• Verilog
• Integrated Circuit Design