Subrahmanya Pradeep Morusupalli

Chip-package-board Signal and Power Integrity Lead @Renesas Electronics

Hyderabad, TG, IN
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Jan 2024 — Present

Chip-package-board Signal and Power Integrity Lead @Renesas Electronics

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Hyderabad, IN

EDUCATION

2007 — 2010

Texas A&M University

M.S., Microelectronics

2010 — 2011

Vanderbilt University

(Ph.D.), Solidstate Devices

SKILLS

Synopsys Sentaurus DeviceDevice DesignMatlabLinuxSimulationsAgilent AdsPerlSemiconductorsVery-Large-Scale Integration (Vlsi)Cadence AllegroCadence VirtuosoCmosDeveloped Fem Based Physical/Computational Tools on MatlabSpice Scripting and Symantics on Hspice, Pspice, LtspiceFinite Element AnalysisHspice

ABOUT SUBRAHMANYA PRADEEP MORUSUPALLI

16 years of semiconductor industry and academic research experience of which13 years as DDR and High Speed Interface Signal Integrity and Power Integrity Analysis Engineer, 3 years of research experience focused on Device Physics. Worked as software engineer for 2 years in software programming. Active inventor and authored journal articles and in conference proceedings.Specialties: Channel simulations - Full system analysis IO-PKG-PCB-PKG-IODriving parameter sensitivity studies for segregated component and full system optimizationsPDN analysis and Co-SIPI analysis HSPICE for circuit transient analyses, ADS for time and FD analyses, AEDT for EM design. Ansys SIwave for model extractions.Also, developed FEM based physics models for 1D transport and electrostatics in nanomaterial channel based MOSFETS and MuGFETS using MATLAB.Device Modeling with TCAD (Sentaurus).

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Subrahmanya Pradeep Morusupalli — Chip-package-board Signal and Power Integrity Lead at Renesas Electronics in Hyderabad, TG, IN | Unifers