Subhash Patil
Sr Staff Manager at Marvell Semiconductor
- Role
- Sr Staff Manager at Marvell Technology
- Location
- Pune, MH, IN
- LinkedIn followers
- 500 followers
About Subhash Patil
Diversified experience of verification and FPGA design,emulation and prototype*- Knowledge of SV/UVM verification- Resource planning,Drive technical team of 10+ Engineers - Building Unit level and CPU sub-system level testbench environment- Full Chip Verification and Closure- Knowledge of ASIC Prototyping using multi FPGA platform- Synthesis, PAR - Implementation-Testing-Emulation using Veloce tool- Digital design and clock management- End to End FPGA/ASIC Product cycle- Hands on Technical Leadership skills.
Experience
Sr Staff Manager
Dec 2019 — Present · Pune, IN
Education
Savitribai Phule Pune University
Master’s Degree, VLSI and Embedded Systems
2013 — 2015
Skills
- Functional Verification
- Universal Verification Methodology (Uvm)
- System on a Chip (Soc)
- Fpga
- Asic
- Verilog
- Vlsi
- Embedded Systems
- Project Planning
- Asic Prototyping
- Systemverilog
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