Subhanil Maity
Senior Analog Circuit Design Engineer @Cyient Semiconductors | Cadence
- Role
- Senior Engineer - Ams Design at Cyient Semiconductors
- Location
- Kolkata, WB, IN
- LinkedIn followers
- 500 followers
About Subhanil Maity
An Analog Circuit Design Engineer with 5 years of experience working on GDDR7/HBM4/HBM…
Experience
Senior Engineer - Ams Design
Sep 2022 — Present · Kolkata, IN
Worked on GDDR7/HBM4/HBM 3E/PCIe Gen5 in TSMC 12/7/3/2 nm, Samsung 4 nm, and Intel 3 nm FinFET technology. Contributed in designing frequency dividers, Proportional/Integral Charge Pump, Duty Cycle Corrector, StrongArm Latch, Clock Distribution Network etc. in TSMC 16/12/7/3nm FINFET technology as a Senior Analog and Mixed Signal Design Engineer.
Education
West Bengal University of Technology, Kolkata
Master of Technology (M.Tech.), Control & Instrumentation Engineering
2008 — 2010
Narendrapur Ramakrishna Mission Vidyalaya
High School
1995 — 2001
West Bengal University of Technology, Kolkata
Bachelor of Technology (B.Tech.), Electronics and Instrumentation Engineering
2003 — 2007
National Institute Of Technology Sikkim
Doctor of Philosophy (Ph.D.), Analog IC Design
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