Steve Nassif

Senior Etch Process Engineer @NXP Semiconductors

Responsible for the SuperE and DPS etchers for all BEOL Etch layers including Via, Metal and MIM for Aluminum technologies, MCAP and MIM for Copper technologies, and a 200A Al Pixel Mirror etch. • Resolved the CHF3 polymer cone defects at the MCAP layer eliminating a 12% scrap rate at the edge of wafer on all Cu products while increasing the MTBC for the etch toolset from 75 to 350 RF hrs. • Resolved the Cu extrusion defects at the BE MIM layer for the 0.18 um HiP6MW product line which lifted a long-term major customer line-down incident. • Championed the Etch ECMS-Equipment Constants Monitoring System and the Etch TMON/DMON-Tool/Defect Monitoring System and served as the Etch PKU-Promis Key User. • Led the UAlarm System founders team which implemented the UAlarms on all tools in all areas in the fab. Correlated tool UAlarms to scrap at EOL and established OCAPs-Out of Control Action Plans to address tools and products affected. • Received the Six Sigma Green Belt certification and became 1 of 11 engineers holding this certificate out of 200+ Process and Device engineers at ATMC. Taught the White and Yellow Belt classes to Associates and Technicians at ATMC. • Led several control plans audits in the etch area which included the FDC, FMEA, SPC, UAlarm, ECMS, TMON/DMON, OCAPs and Promis for existing and NPI products and technologies. • Represented the etch area for the CQIs-Continuous Quality Improvement investigations and formulated the 8D reports back to the customers and the 3x5 Whys reports to management.