Stephane Barillet
STMicroelectronics
Aix-en-Provence, FR
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Present
@STMicroelectronics
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SKILLS
FpgaPcieVhdlVerilogSystemverilogRtl DesignFunctional VerificationAsicSocXilinxXilinx VivadoAlteraCTcp/Udp Offloading EngineTclPerlLinuxArm Axi4 ProtocolPythonField-Programmable Gate Arrays (Fpga)
ABOUT STEPHANE BARILLET
RTL design engineer with 20+ years of experience, I worked on state-of-the-art IP and…
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