Srinu Vadthya
RTL Design Engineer @Qualcomm || M.Tech-NITA
- Role
- Engineer at 高通
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Srinu Vadthya
Passionate towards VLSI industry with Skilled in Digital Design Engineering.Have hands on Experience in RTL Design, lint checks, CDC Checks, Writing Synopsis Design Constraints (SDC), Synthesis, DFT Insertion, RDC Checks, STA, Low power checks, UPFTools: Xcelium,VCS, Questa Sim, Questa CDC, Questa lint, ISM,Gvim, Modus(ATPG), spyglass, verdiOS : Windows, LinuxLanguages : Verilog, SystemVerilog, C++, Python, TCLStrength : Individual Contributer, Quick Learner, Team Work
Experience
Engineer
Nov 2024 — Present · Chennai, IN
Working on Always On Subsystem(AONSS), RTL Coding, UPF, Lowpower checks ~ Static and Dynamic power, PLDRC, CDC, CLP and DG, power estimation using PTPX
Education
Vidya Jyothi Institute Of Technology
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
State Board of Technical Education and Training
diploma, Electrical, Electronics and Communications Engineering
Motilal Nehru National Institute Of Technology
Master of Technology - MTech, Communication Systems
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