Srinivas P V N

Processor Logic Manager

Role
Post Silicon Validation Manager - Power Management at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Srinivas P V N

Experienced Senior Engineer with a demonstrated history of working on chip design in Design verification, Post silicon validation in Project Management and leadership roles. Managed multiple projects efficiently and effectively from resource planning to project scheduling and tracking with an excellent track record of delivering on time or ahead of time with high quality. Coached many team members in career development and experience in identifying raw talent and molding them to leaders.

Experience

  1. Post Silicon Validation Manager - Power Management

    Intel

    Jan 2024 — Present

Skills

  • C/C++
  • Vera
  • I2c
  • Asic
  • Functional Verification
  • Dft
  • Testing
  • Hardware and Software Co-Simuaton
  • Systemverilog
  • Debugging
  • Processors
  • C++
  • Verilog
  • Pcie
  • Vlsi
  • Rtl Design
  • Firmware
  • Hardware Bring-Up

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Srinivas P V N — Post Silicon Validation Manager - Power Management at Intel in Bengaluru, KA, IN | Unifers