Srinivas Naidu
SoC design engineer at Intel
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Srinivas Naidu
I have good experience in Backend implementation aspects such as Synthesis, constraints development, LEC, Timing closure, Signal Integrity Analysis, Timing Sign-off, ECO\'s at the block, and SoC level.Hands-on experience with EDA tools like Cadence Encounter, Innovus, Genus, Tempus. ConformalScripting knowledge on Tcl, Perl, Shell.Highly Motivated, Excellent Team Spirit, Self Learning
Experience
Soc Design Engineer
Sep 2020 — Present · IN
Education
Sri Chaitanya Junior College
Intermediate (MPC), MPC
2007 — 2009
Chaitanya Institute of Science and Technology
Bachelor's Degree, Electrical and Electronics Engineering
2009 — 2013
Sri Shirdi Sai Vidya Niketan
SSC, SSC
1999 — 2007
Skills
- Perl
- Windows
- Floorplanning
- Python
- Microsoft Word
- Electronics
- Physical Verification
- Physical Synthesis
- Tcl
- C
- Microsoft Excel
- Powerpoint
- Electricians
- Static Timing Analysis
- Microsoft Office
- Physical Design
- Electrical Engineering
- Clock Tree Synthesis
- Place & Route
- Unix
- Perl Automation
- Electric Power
- Timing Closure
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.