Srinivas
HR Manager @Graphene Semiconductors
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WORK HISTORY
HR Manager @Graphene Semiconductors
Bangalore, IN
EDUCATION
University of Mumbai
University of Mumbai
ABOUT SRINIVAS
Requirements: 1.Design(System Verilog/ Specman-e/System Verilog/ Vera/ SystemC) – 2. Verification (SOC/CPU with ARM processor experience) 3. Design,Synthesis,STA 4. ASIC/SoC design 5. Memory Circuit Designer 6. Physical verification (analog physical design concepts experience)- 7. Sr. Analog Circuit Design Engineer - 3 to 10yrs 8. Sr. Analog Layout Design Engineer – 3 to 10yrs 9. IO Design/PLL design/RF design – 3 to 10yrs 10. DFT/ATPG Flow/Methodology Engineer- 4 to 10 11. Sr physical design- 12 Sr Asic Design Manager 13 Sr Design engineer
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