Srinija Reddy Lankala
CPU Architectural Design Verification Engineer @ Ampere | MS in Electrical Engineering at SJSU.
- Role
- Cpu Architectural Design Verification Engineer at Ampere
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Experience
Cpu Architectural Design Verification Engineer
Oct 2025 — Present · Santa Clara, CA, US
Education
Chaitanya Bharathi Institute Of Technology
Bachelor of Engineering - BE, Electronics and Communications Engineering
San José State University
Master of Science - MS, Electrical Engineering
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