Srikanth Reddy
GFXIP Design Verification
- Role
- Sr Manager Silicon Design Engineering at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Sr Manager Silicon Design Engineering
Jul 2025 — Present · Telangana, IN
Education
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, MicroElectronics
2017 — 2019
Skills
- Rtl Design
- Asic
- System Verilog
- Ovm Methodology
- System on a Chip (Soc)
- Debugging
- Very-Large-Scale Integration (Vlsi)
- Systemverilog
- Verilog
- Uvm Methodology
- Functional Verification
- Perl
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