Sriganesh Balakumar
- Role
- Asic Design Engineer, Machine Learning Accelerators at Google
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
Experience
Asic Design Engineer, Machine Learning Accelerators
Jan 2023 — Present
Education
College of Engineering, Guindy
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2011 — 2015
University of Illinois Chicago
Master of Science (M.S.), Electrical and Computer Engineering
2015 — 2017
Chettinad Vidyashram
Senior School Certificate Examination (Class XII)
2009 — 2011
Skills
- Simplescalar
- Windows
- Html
- Management
- Verilog
- Microsoft Excel
- Microcontrollers
- Very-Large-Scale Integration (Vlsi)
- Altera Quartus
- Computer Architecture
- Matlab
- Systemverilog
- Asic
- Cadence
- Teamwork
- Microsoft Word
- Embedded Systems
- Python
- Digital Circuit Design
- Ltspice
- Unix
- Microprocessors
- Fpga
- Vhdl
- Xilinx Ise
- Algorithms
- Leadership
- Arduino
- Cadence Virtuoso
- Hardware
- Rtl Design
- Java
- Linux
- Perl
- C++
- Digital Ic Design
- Assembly Language
- Field-Programmable Gate Arrays (Fpga)
- Public Speaking
- Microsoft Office
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