Sridhar Cheruku

About Sridhar Cheruku

Currently spearheading the UCIe IP development team, having successfully delivered high-quality IPs for Intel’s next-generation server and client products.With over 19 years in IP design, I specialize in architectural design and managing the full IP development lifecycle, from initial specification to silicon validation. My expertise includes delivering high-quality, silicon-validated IPs across various domains such as D2D, UCIe, DDR, LPDDR PHYs, DLL, PLL, and high-speed custom I/O libraries. My contributions have been crucial to the success of numerous products across multiple technology nodes and foundries.In my role as Head of Faraday\'s India center, I led the development of a high-performance LPDDR4 PHY IP at 4.2Gbps, achieving first-pass silicon success. I also spearheaded the creation of an 8.4Gbps variant and designed advanced combo PHYs for DDR3, DDR4, LPDDR3, LPDDR4, and LPDDR5. My role encompassed defining architecture, providing technical leadership, solving complex challenges, and overseeing the entire development process from RTL design to GDSII. I implemented robust SOPs to ensure design quality and streamlined cross-site communication.

Experience

1. Ip Design Engineer

   Intel

   Mar 2022 — Present

   Leading the UCIe PHY development

Education

• JNTU

  Bachelors, Electronics and Communication

  1999 — 2003

• Indian Institute of Technology, Bombay

  Masters, Microlectronics

  2004 — 2006

Skills

• Phy
• Semiconductors
• Mixed Signal
• Circuit Design
• Rtl Design
• Static Timing Analysis
• Verilog
• Vlsi
• Sensors
• Ddr2
• Ddr
• Soc
• Cmos
• Analog
• Asic
• Signal Integrity
• Testing
• Ic