Sri Satya Pavan Doolla
Senior Design Verification Engineer at Micron Technology
- Role
- Senior Design Verification Engineer at Micron Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Sri Satya Pavan Doolla
Experienced VLSI Logic Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Perl, C++, Verilog, UVM and Linux. Strong quality assurance professional with a Bachelor of Technology - BTech focused in Electrical, Electronics and Communications Engineering
Experience
Senior Design Verification Engineer
Nov 2023 — Present · Hyderabad, IN
Education
Pragati Engineering College
Bachelor of Technology - BTech, ECE
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Microelectronics
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