Sri Sakthi Santhanam
SoC DFT Engineer
- Role
- Soc Design Engineer - Dft at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sri Sakthi Santhanam
o 13.2 years of experience in DFT implementation and verification o Expertised in in Scan insertion using Fusion Compiler toolo ATPG pattern generation and validation using timing simulations.o MBIST insertion and verification using Modus and Genus tool,BSCAN and Hierarchical Tap verificationo Have hands on experience in ATPG simulations, EFUSE, SerDes BIST verification and Scan Retargetingo Worked closely with test engineering team and supported Post Silicon bring upo Good understanding of LBIST, Scan and ATPG.o Received many SPOT awards from Infosys, Altran, Synopsys and Intel for quality of work deliverables
Experience
Soc Design Engineer - Dft
Aug 2022 — Present · Bengaluru, IN
Education
Sona College of Technology
Bachelor of Engineering - BE, Electronics and Communication Engineering
2005 — 2009
Amrita Vishwa Vidyapeetham
M.Tech , VLSI Design
2009 — 2011
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