Sreyas M.
- Role
- Silicon Design Verification Engineer at Microsoft
- Location
- Mountain View, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Silicon Design Verification Engineer
Mar 2020 — Present
Skills
- Synopsys Tools
- C
- Functional Verification
- Linux
- Atlassian Jira
- Universal Verification Methodology (Uvm)
- Python
- Matlab
- Programming
- Arduino
- Cadence Orcad
- Wireshark
- Unix
- Rtl Verification
- Github
- Verilog
- Json
- Xml
- Embedded C
- Microcontrollers
- Microsoft Word
- Microsoft Powerpoint
- Eaglecad
- Software Development
- Perl
- Solidworks
- C++
- Perforce
- Social Media
- Systemverilog
- Java
- Teamwork
- Microsoft Excel
- Android Development
- Raspberry Pi
- Pcb Design
- Eclipse
- Mqtt
- Microsoft Office
- Git
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