Sreelakshmi P G
Physical Design Engineer @Infineon Technologies
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WORK HISTORY
Physical Design Engineer @Infineon Technologies
Munich, DE
EDUCATION
College of Engineering Trivandrum
Bachelor of Technology - BTech
ABOUT SREELAKSHMI P G
Professional Summary*6 years of experience in Semiconductor industry - Backend Design*successful tape outs involving, Technology nodes of 14 nm,16nm and 28nm Up to 11 metal layers. Blocks up to 12+ Million gates & performance up to 640MHz *Timing closure for Functional, Scan Shift and Capture modes.*Environment & SDC Validation*Timing analysis and ECO fixes in & Manual mode*X-talk noise and delay effect on timing*Experience in multiple STA signoff checks like max_tran,min_period_check etc*DFT STA
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