Sreejith Sudhakaran
Principal Engineer @Arm
Cambridge, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
May 2025 — Present
Principal Engineer @Arm
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Cambridge, GB
EDUCATION
2009 — 2010
University of Essex, United Kingdom
M.Sc, Embedded System (Distinction)
1998 — 2002
Mahatma Gandhi University, India
B.Tech, Electronics & Communications Engineering (Distinction)
SKILLS
MicrocontrollersUvmCEmbedded SystemsUniversal Verification Methodology (Uvm)LinuxSpecmanPcieVhdlNcsimC++UsbDigital Signal ProcessorsVmmEmbedded CSystemverilogVerilogAmba AhbUnixOpen Verification MethodologySva (System Verilog Assertions)
ABOUT SREEJITH SUDHAKARAN
Hardware languages : System Verilog, SVA, Verilog, VHDL, VERA, Specman-eVerification Methodologies : UVM, OVMProtocols : AXI, AHB, APB, RFFE, DigRFVersion control : Clearcase, Clearquest, CVS, PerforceProgramming Languages : C, C++Scripting : Basics of Python and PerlOperating Systems : UNIX, MS-DOS, WindowsOthers : Matlab, Cadence ncsim, Simvision, VCS, Novas Verdi, Vmanager
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