Souvik Dey
VLSI Engineer (RTL Design) @ Signion Systems || M.Tech in Microelectronics and VLSI Design @UoH || GATE Qualified (EC) in 2022,2023 ||
- Role
- Vlsi Engineer (Rtl Design) at Signion Systems
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Souvik Dey
Experienced in RTL Design, Verilog, System Verilog, VLSI Signal Processing, and CMOS…
Experience
Vlsi Engineer (Rtl Design)
Oct 2024 — Present · Hyderabad, IN
Education
University of Calcutta
Bachelor of Science - BS
2015 — 2018
University of Hyderabad
Master of Technology - MTech
2022 — 2024
Rajbalhat High School
Higher Secondary
2013 — 2015
Bilara High school
Secondary
2007 — 2013
Vidyasagar University
Master of Science - MS
2018 — 2020
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