Sorabh Sachdeva
- Role
- Cadence Design Systems (India) Pvt Ltd at Intel
- Location
- South Delhi, DL, IN
- LinkedIn followers
- 500 followers
Experience
Cadence Design Systems (India) Pvt Ltd
Present
Skills
- Low-Power Design
- Tcl
- Asic
- Functional Verification
- Soc
- Vlsi
- Clock Tree Synthesis
- Logic Synthesis
- Verilog
- Static Timing Analysis
- Perl
- Eda
- Rtl Design
- Physical Design
- Semiconductors
- Timing Closure
- Systemverilog
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